Baya Systems, a leader in high-performance semiconductor system technologies, will join industry innovators at the 2025 Design Automation Conference (DAC) to showcase advances in chiplet-ready design and system scalability for the next generation of AI.
What: As part of the EE Times Chiplet Pavilion program, Baya Systems executives will offer expert insights on building a thriving chiplet economy and enabling next-generation modular architectures. The sessions will explore real-world implementations, ecosystem challenges and the technical breakthroughs accelerating chiplet adoption.
Featured Sessions Include:
- “Developing the Chiplet Economy” panel featuring Chief Commercial Officer Nandan Nayampally:
This session will dive into the commercial and technical readiness of chiplets, examining the barriers to mass adoption—from lack of interface standards to integration complexity—and the need for collaboration across foundries, IP providers, and tool vendors. Expect insights on pre-validation, security, traceability, and how to unlock an interoperable, scalable multi-die supply chain. - “Unleashing Scale Through Chiplets – From Concept to Deployment,” presented by CEO and founder Dr. Sailesh Kumar:
As AI drives exponential growth in compute and data movement demands, this session explores how chiplets offer a powerful path forward. Dr. Kumar will detail the design mindset, architectures, and data fabrics required to build next-gen systems for the edge and the cloud—backed by live examples of how Baya’s chiplet-ready IP is already delivering real-world impact.
